1. Field of the Invention
The present invention relates, to a semiconductor device having a transistor and a method of driving the semiconductor device. Further, the present invention relates to an active matrix light emitting device having a semiconductor device with a thin film transistor (hereinafter referred to as a TFT) formed on an insulator such as glass or plastic, and a method of driving the semiconductor device. Also, the present invention relates to electronic equipment using this type of light emitting device.
2. Description of the Related Art
The development of display devices in which light emitting elements such as electro luminescence (EL) elements are used, has become active in recent years. Being self-luminous, the light emitting element is high in visibility and eliminates the need for a backlight that is necessary in liquid crystal display devices (LCDs) etc., thereby being capable of reducing the thickness of such devices. Also, the light emitting devices may have virtually no limit in terms of viewing angles.
The term EL element indicates an element having a light emitting layer in which luminescence generated by application of an electric field can be obtained. There are light emission when returning to a base state from a singlet excitation state (fluorescence), and light emission when returning to a base state from a triplet excitation state (phosphorescence) in the light emitting layer. A light emitting device of the present invention may use either of the aforementioned types of light emission.
EL elements normally have a laminate structure in which a light emitting layer is sandwiched between a pair of electrodes (anode and cathode). A laminate structure consisting of an anode, a hole transporting layer, a light emitting layer, an electron transporting layer, and a cathode can be given as a typical structure. Further, structures having the following layers laminated in order between an anode and a cathode also exist: a hole injecting layer, a hole transporting layer, a light emitting layer, and an electron transporting layer; and a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, and an electron injecting layer. Any of the above-stated structures may be employed as the EL element structure used in the light emitting device of the present invention. Furthermore, fluorescent pigments and the like may also be doped into the light emitting layer.
Here, all layers formed in EL elements between the anode and the cathode are referred to generically as “EL layers”. The aforementioned hole injecting layer, hole transporting layer, light emitting layer, electron transporting layer, and electron injecting layer are all included in the category of EL layers, and light emitting elements structured by an anode, an EL layer, and a cathode are referred to as EL elements.
The structure of a pixel in a general light emitting device is shown in FIG. 8. Note that an EL display device is used as an example of a typical light emitting device. The pixel shown in FIG. 8 has a source signal line 801, a gate signal line 802, a switching TFT 803, a driver TFT 804, capacitor means 805, an EL element 806, an electric current supply line 807, and an electric power source line 808.
The connectivity relationship between each portion is explained. The term TFT as used here refers to a three terminal element having a gate, a source, and a drain, but it is difficult to make clear distinctions between the source and the drain due to the structure of TFTs. One terminal, the source or the drain, is therefore denoted as a first electrode, and the other terminal is denoted as a second electrode when explaining the connections between the elements. The terms source and drain are used in the case where a definition of the electric potential of each element is necessary relating to on and off states of the TFT (for example, when explaining a voltage between the gate and the source of the TFT).
Further, the TFT being in an on state refers to a state in which the voltage between the gate and the source of the TFT exceeds the threshold value of the TFT, and electric current flows between the source and the drain. The TFT being in an off state refers to a state in which the voltage between the gate and the source of the TFT is less than the threshold value of the TFT, and the electric current does not flow between the source and the drain. Note that there are, cases in which a slight amount of the electric current, referred to as a leak current, flows between the source and the drain even if the voltage between the gate and the source of the TFT is less than the threshold value. However, this state is treated similarly to the off state.
A gate electrode of the switching TFT 803 is connected to the gate signal line 802, a first electrode of the switching TFT 803 is connected to the source signal line 801, and a second electrode of the switching TFT 803 is connected to a gate electrode of the driver 804. A first electrode of the driver TFT 804 is connected to the electric current supply line 807, and a second electrode of the driver TFT 804 is connected to a first electrode of the EL element 806. A second electrode of the EL element 806 is connected to the electric power source line 808. There is a mutual electric potential difference between the electric current supply line 807 and the electric power source line 808. Further, the capacitor means 805 may be formed between the gate electrode of the driver TFT 804 and the line having a fixed electric potential, such as the electric current supply line 807, in order to maintain the voltage between the gate and the source of the driver TFT 804 during light emission.
An image signal input to the source signal line 801 is then input to the gate electrode of the driver TFT 804 if a pulse is input to the gate signal line 802 and the switching TFT 803 is on. The voltage between the gate and the source of the driver TFT 804, and the amount of the electric current flowing between the source and the drain of the driver TFT 804 (hereinafter referred to as a drain current), are determined in accordance with the electric potential of the input image signal. This electric current is supplied to the EL element 806, and the EL element 806 emits light.
TFTs formed by polycrystalline silicon (hereinafter referred to as P—Si) have a higher field-effect mobility than TFTs formed by using amorphous silicon (hereinafter referred to as A-Si), and a larger on current, and therefore are very suitable as transistors used in light emitting devices.
Conversely, TFTs formed by P—Si have a problem in that dispersion in their electrical characteristics tends to develop due to defects in crystal grain boundaries.
If there is a dispersion in TFT threshold values, for example a dispersion per pixel in the threshold values of the driver TFTs 804 in FIG. 8, then a difference in the brightness of the EL elements 806 develops due to dispersion in the value of the drain current of the TFTs, corresponding to the dispersion in the TFT threshold values, even if the same image signal is input to different pixels. This particularly becomes a problem for display devices employing an analog gray scale method.
It has been proposed recently that these types of TFT threshold value dispersions can be corrected. A structure shown in FIG. 10 can be given as one example of such as proposal (refer to patent document 1).    [Patent document 1] International Publication number 99-48403 pamphlet (p. 25, FIG. 3, FIG. 4).
A pixel shown in FIG. 10A has a source signal line 1001, first to third gate signal lines 1002 to 1004, TFTs 1005 to 1008, capacitor means 1009 (C2) and 1010 (C1), an EL element 1011, an electric current supply line 1012, and an electric power source line 1013.
A gate electrode of the TFT 1005 is connected to the first gate signal line 1002, a first electrode of the TFT 1005 is connected to the source signal line 1001, and a second electrode of the TFT 1005 is connected to a first electrode of the capacitor means 1009. A second electrode of the capacitor means 1009 is connected to a first electrode of the capacitor means 1010, and a second electrode of the capacitor means 1010 is connected to the electric current supply line 1012. A gate electrode of the TFT 1006 is connected to the second electrode of the capacitor means 1009 and the first electrode of the capacitor means 1010, a first electrode of the TFT 1006 is connected to the electric current supply line 1012, and a second electrode of the TFT 1006 is connected to a first electrode of the TFT 1007 and a first electrode of the TFT 1008. A gate electrode of the 1007 is connected to the second gate signal line 1003, and a second electrode of the TFT 1007 is connected to the second electrode of the capacitor means 1009. A gate electrode of the TFT 1008 is connected to the third gate signal line 1004, and a second electrode of the TFT 1008 is connected to a first electrode of the EL element 1011. A second electrode of the EL element 1011 is connected to the electric power source line 1013, and has a mutual electric potential difference with the electric current supply line 1012.
Operation is explained using FIGS. 10A and 10B, and FIGS. 11A to 11F. FIG. 10B shows image signals input to the source signal line 1001 and the first to the third gate signal lines 1002 to 1004, and shows pulse timing. FIG. 10B is divided into sections I to VIII corresponding to each operation shown in FIGS. 11A to 11F. Further, a structure using four TFTs is used as an example in the pixel shown in FIGS. 10A and 10B, with all four being p-type TFTs. The TFTs therefore turn on when an L level signal is input to their gate electrodes, and turn off when an H level signal is input. Furthermore, although image signals input to the source signal line 1001 are shown here which have a pulse shape in order to indicate input periods only, predetermined analog electric potentials may also be used for an analog gray scale method.
First, L level is input to the first and the third gate signal lines 1002 and 1004, and the TFTs 1005 and 1008 turn on (section I). The second gate signal line 1003 then becomes L level, and the TFT 1007 turns on. Electric charge accumulates in the capacitor means 1009 and 1010 as shown in FIG. 11A. The TFT 1006 turns on at the point when an electric potential difference between both electrodes of the capacitor means 1010, in other words, when a voltage maintained in the capacitor means 1010, exceeds a threshold value |Vth| of the TFT 1006 (section II).
The third gate signal line 1004 then becomes H level, and the TFT 1008 turns off. The electric charge which has accumulated in the capacitor means 1009 and 1010 thus moves once again, and the voltage stored in the capacitor means 1010 soon becomes equal to |Vth|. The electric potential of the electric current supply line 1012 and the electric potential of the source signal line 1001 are both an electric potential VDD at this point, as shown in FIG. 11B, and therefore the voltage maintained in the capacitor means 1009 also becomes equal to The TFT 1006 therefore soon turns off.
The second gate signal line 1003 becomes H level after the voltages maintained in the capacitor means 1009 and 1010 become equal to |Vth|, as discussed above, and the TFT 1007 turns off (section IV). |Vth| is thus stored in the capacitor means 1009 by this operation, as shown in FIG. 11C.
A relationship like that of Eq. (1) results for an electric charge Q1 stored at this point in the capacitor means 1010 (C1). Similarly, a relationship like that of Eq. (2) results for an electric charge Q2 stored at this point in the capacitor means 1009 (C2).
[Eq. (1)]Q1=C1×|Vth|  (1)[Eq. (2)]Q2=C2×|Vth|  (2)
Input of an image signal is then performed as shown in FIG. 11D (section V). The image signal is output to the source signal line 1001, and the electric potential of the source signal line 1001 changes from the electric potential VDD to an electric potential VData of the image signal (the TFT 1006 is a p-channel TFT here, and therefore VDD>VData). If the electric potential of the gate electrode of the TFT 1006 is taken as an electric potential VP, and the electric charge in the node is taken as Q, then relationships like those of Eq. (3) and Eq. (4) develop due to conservation law of charge including the capacitor means 1009 and 1010.
[Eq. (3)]Q+Q1=C1×(VDD−VP)   (3)[Eq. (4)]Q−Q2=C2×(VP−VData)   (4)
From Eqs. (1) to (4), the electric potential VP of the gate electrode of the TFT 1006 can be expressed by Eq. (5).
[Eq. (5)]
                              Eq          .                                          ⁢                      (            5            )                          ⁢                                                                                                V          P                =                                                            C                1                                                              C                  1                                +                                  C                  2                                                      ⁢                          V              DD                                +                                                    C                2                                                              C                  1                                +                                  C                  2                                                      ⁢                          V              Data                                -                                    /                              V                th                                      /                                              (        5        )            
A voltage VGS between the gate and the source of the TFT 1006 is therefore expressed by Eq. (6).
[Eq. (6)]
                              Eq          .                                          ⁢                      (            6            )                          ⁢                                                                                                                                          V                GS                            =                                                V                  P                                -                                  V                  DD                                                                                                        =                                                                                          C                      2                                                                                      C                        1                                            +                                              C                        2                                                                              ⁢                                      (                                                                  V                        Data                                            -                                              V                        DD                                                              )                                                  -                                                      /                                          V                      th                                                        /                                                                                                        =                                                                                          C                      2                                                                                      C                        1                                            +                                              C                        2                                                                              ⁢                                      (                                                                  V                        Data                                            -                                              V                        DD                                                              )                                                  +                                  V                  th                                                                                        (        6        )            
The term Vth is contained in the right-hand side of Eq. (6). That is, the threshold voltage of the TFT 1006 in each pixel is added to the image signal input from the source signal line 1001, and this is stored by the capacitor means 1009 and 1010.
The first gate signal line 1002 becomes H level when the input of the image signal is complete, and the TFT 1005 turns off (section VI). The source signal line 1001 then returns to a predetermined electric potential (section VII). Operations for writing in the image signal to the pixels are thus complete (FIG. 11E).
The third gate signal line 1004 then becomes L level, the TFT 1008 turns on, and the EL element 1011 emits light due to electric current flowing in the EL element 1011, as shown in FIG. 11F. The amount of electric current flowing in the EL element 1011 at this point depends upon the voltage between the gate and the source of the TFT 1006, and a drain current IDS flowing in the TFT 1006 is expressed by Eq. (7).
[Eq. (7)]
                              Eq          .                                          ⁢                      (            7            )                          ⁢                                                                                                                                          I                DS                            =                                                β                  2                                ⁢                                                      (                                                                  V                        GS                                            -                                              V                        th                                                              )                                    2                                                                                                        =                                                β                  2                                ⁢                                                      {                                                                                            C                          2                                                                                                      C                            1                                                    +                                                      C                            2                                                                                              ⁢                                              (                                                                              V                            Data                                                    -                                                      V                            DD                                                                          )                                                              }                                    2                                                                                        (        7        )            
It can be seen from Eq. (7) that the drain current IDS of the TFT 1006 does not depend on the threshold value Vth. The value of the electric current flowing in the EL elements 1011 of each of the pixels therefore does not change, even if there is dispersion in the threshold values of the TFTs 1006 in each of the pixels. Electric current therefore flows correctly in the EL elements 1011 in accordance with the image signal VData.
However, the drain current IDS in Eq. (7) does depend upon the capacitances C1 and C2 with the aforementioned structure. That is, the drain current IDS will have dispersion if the capacitance values of the capacitor means 1009 and 1010 have dispersion.